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Silicon Labs /Series1 /EFR32FG12P /EFR32FG12P431F1024GL125 /GPIO /ROUTEPEN

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Interpret as ROUTEPEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWCLKTCKPEN)SWCLKTCKPEN 0 (SWDIOTMSPEN)SWDIOTMSPEN 0 (TDOPEN)TDOPEN 0 (TDIPEN)TDIPEN 0 (SWVPEN)SWVPEN 0 (ETMTCLKPEN)ETMTCLKPEN 0 (ETMTD0PEN)ETMTD0PEN 0 (ETMTD1PEN)ETMTD1PEN 0 (ETMTD2PEN)ETMTD2PEN 0 (ETMTD3PEN)ETMTD3PEN

Description

I/O Routing Pin Enable Register

Fields

SWCLKTCKPEN

Serial Wire Clock and JTAG Test Clock Pin Enable
SWDIOTMSPEN

Serial Wire Data and JTAG Test Mode Select Pin Enable
TDOPEN

JTAG Test Debug Output Pin Enable
TDIPEN

JTAG Test Debug Input Pin Enable
SWVPEN

Serial Wire Viewer Output Pin Enable
ETMTCLKPEN

ETM Trace Clock Pin Enable
ETMTD0PEN

ETM Trace Data Pin Enable
ETMTD1PEN

ETM Trace Data Pin Enable
ETMTD2PEN

ETM Trace Data Pin Enable
ETMTD3PEN

ETM Trace Data Pin Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data